Optimizing performance of distributed memory workloads for high performance computing (hpc) and data center networks

dc.contributor.advisorQu, Guangzhi
dc.contributor.authorNewaz, Md Nahid
dc.contributor.otherLu, Lunjin
dc.contributor.otherMollah, Md Atiqul
dc.contributor.otherCholis, Ilias
dc.date.accessioned2025-07-11T18:22:49Z
dc.date.available2025-07-11T18:22:49Z
dc.date.issued2024-01-01
dc.description.abstractToday’s high-performance computing (HPC) and large-scale data center systems are constructed by interconnecting thousands of computing nodes, storage devices, hardware accelerators, and I/O devices. Due to the rapid growth in the scale of these systems, along with their complex interconnect topologies and the need to support diverse applications, the interconnection network has become one of the major bottlenecks for performance, efficiency, and resource utilization. My research focuses on developing novel, efficient, and scalable routing methods to reduce latency and optimized scheduling methods to improve throughput and system utilization. I validated these proposed approaches through various experimental studies using state-of-the-art benchmarks, as well as real scientific and synthetic applications. The goal is to facilitate the future adoption of these approaches in next-generation HPC and data center network systems
dc.identifier.urihttps://hdl.handle.net/10323/18789
dc.relation.departmentComputer Science and Engineering
dc.subjectData Center Networks
dc.subjectDistributed Memory Workloads
dc.subjectHigh Performance Computing
dc.subjectInterconnect Networks
dc.subjectRouting
dc.subjectScheduling
dc.titleOptimizing performance of distributed memory workloads for high performance computing (hpc) and data center networks

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